Makefile

Before we can have a useful makefile, we should first create some files that the build tool can be run against.

module.h

#include

void sample_func();


module.c

#include "module.h"

void sample_func() {
    printf("Hello World!");
}


main.c

#include "module.h"

void sample_func();

int main() {
    sample_func();
    return 0;
}


So, now we have a directory with 3 files. A module which includes a header and source file. And a main source file that includes an entry point and has a dependency on our module. Let's make a Makefile for this.

GCC = gcc
FLAGS = -O2 -j3
CC = ${GCC} ${FLAGS}

all: main.o module.o
  ${CC} main.o module.o -o target_bin
main.o: main.c module.h
  ${CC} -I . -c main.c
module.o: module.c module.h
  ${CC} -I . -c module.c
clean:
  rm -rf *.o
  rm target_bin